(ds8570 rev. e) 08/13 1 2 3 4 5 6 7 8 pin slp 1.5 tx0in tx1in gnd v- txaout txbout v+ symbol logic input logic input logic input power power output output power function cmos or ttl, v+ is ok cmos or ttl cmos or ttl ground -5 volts line driver terminal a line driver terminal b +5 volts description 0 0 0 1 1 1 tx1in tx0in slp1.5 txaout txbout slope 0 1 1 0 0 1 x 0 1 0 1 x 0v -5v -5v 5v 5v 0v 0v 5v 5v -5v -5v 0v n/a 10 s 1.5 s 10 s 1.5 s n/a hi-8570, hi-8571 august 2013 slp1.5 tx0in tx1in gnd v- txaout txbout v+ 1 2 3 45 6 7 8 arinc 429 +/- 5v supply line driver description ? direct arinc 429 line driver interface in a small package ? on-chip line driver slope control and selection by logic input ? low current 5 volt supplies ? cmos / ttl logic pins ? plastic and ceramic package options - surface mount and dip ? thermally enhanced soic packages ? extended temperature and burn-in available features pin configuration supply voltages function table the hi-8570 and hi-8571 are cmos integrated circuits designed to directly drive the arinc 429 bus in an 8-pin package. two logic inputs control a differential voltage between the output pins producing a +10 volt one, a -10 volt zero, and a 0 volt null. a logic input is provided to control the slope of the differential output signal. timing is set by an on-chip resistor and capacitor and tested to be within arinc requirements. the hi-8570 has 37.5 ohms in series with each line driver output. the hi-8571 provides the option to bypass part of the output resistance so external resistance may be added for lightning protection circuits. the hi-8570 or the hi-8571 along with the hi-8588 line receiver offer the smallest options available to get on and off thearinc 429 bus. pin description table v+ = +5v v- = -5v holt integrated circuits www.holtic.com
application information figure 1 is a block diagram of the line driver. the +5v and -5v levels are generated from the supply voltages. cur- rents for slope control are set by zener voltages across on- chip resistors. the tx0in and tx1in inputs receive logic signals from a control transmitter chip such as the hi-6010, hi-3282, hi- 8282a, hi-8584 or hi-8783. txaout and txbout hold each side of the arinc bus at ground until one of the inputs becomes a one. if for example tx1in goes high, a charging path is enabled to 5v on an ?a? side internal capacitor while the ?b? side is enabled to -5v. the charg- ing current is selected by the slp1.5 pin. if the slp1.5 pin is high, the capacitor is nominally charged from 10% to 90% in 1.5s. if slp1.5 is low, the rise and fall times are 10s. a unity gain buffer receives the internally generated slopes and differentially drives the arinc line. current is limited by the series output resistors at each pin. there are no fuses at the outputs of the hi-8570 as exists on the hi- 8382. the hi-8570 has 37.5 ohms in series with each output and the hi-8571 has 27.5 ohms in series with each output. the hi-8571 is for applications where external series re- sistance is required, typically for lightning protection de- vices. both the hi-8570 and hi-8571 are built using high-speed cmos technology. care should be taken to ensure the v+ and v- supplies are locally decoupled and that the input waveforms are free from negative voltage spikes which may upset the chip?s internal slope control circuitry. figure 2 shows a possible application of the hi-8570/8571 interfacing an arinc transmit channel from the hi- 6010. hi-8570, hi-8571 functional description txaout current control -5v 5v one null zero control logic txbout current control -5v 5v slp1.5 esd protection and voltage translation tx0in tx1in figure 1 - line driver block diagram hi-8570 = 37.5 ohms hi-8571 = 27.5 ohms hi-8570 = 37.5 ohms hi-8571 = 27.5 ohms one null zero control logic ?a? side ?b? side gnd 8 txbout txaout tx1in tx0in arinc channel rinb rina testa testb { hardwired or driven from logic routb routa 5v vcc v- -5v slp1.5 txd0 txd1 rxd0 rxd1 hi-6010 8 bit bus arinc channel 1 2 8 6 7 4 3 45 6 7 2 3 hi-8588 figure 2 - application diagram 5v v+ 1 5 hi-8570 holt integrated circuits 2
v+ = +5v, v- = -5v, t = operating temperature range (unless otherwise stated) a hi-8570, hi-8571 voltages referenced to ground supply voltages v+....................................................+7v v-......................................................-7v dc current per input pin................. 10ma power dissipation at 25c plastic dil............1.0w, derate 10mw/c ceramic dil..........0.5w, derate 7mw/c reflow solder temperature ...............260c storage temperature........-65c to +150c absolute maximum ratings recommended operating conditions dc electrical characteristics supply voltages v+....................................+4.8v to +5.3v v-..................................... -5.3 temperature range industrial ........................-40c to +85c extended......................-55c to +125c v to -4.8v parameters symbol test conditions min typ max units input voltage (tx1in, tx0in, slp1.5) high v 2.1 - v+ volts low v - - 0.5 volts input current (tx1in, tx0in, slp1.5) source i v = 0v - - 0.1 a sink i = 5v - - 0.1 a arinc output voltage (differential) zero v no load -11.00 -10.00 -9.00 volts null v no load -0.50 0 0.50 volts v+ i - 6.0 10.0 ma v- i -10.0 -6.0 - ma arinc output impedence z hi-8570 - 37.5 - ohms hi-8571 - 27.5 - ohms ih il ih in il diff0 diffn dd ee out v one v no load; txaout - txbout 9.00 10.00 11.00 volts ; txaout - txbout ; txaout - txbout arinc output voltage (ref. to gnd) one or zero v no load & magnitude at pin 4.50 5.00 5.50 volts null v no load -0.25 0 0.25 volts operating supply current in diff1 dout nout slp1.5 = v+ tx1in & tx0in = 0v: no load in & tx1in = 0v: no load tx0 note: stresses above absolute maximum ratings or outside recommended operating conditions may cause permanent damage to the device. these are stress ratings only. operation at the limits is not recommended. holt integrated circuits 3
hi-8570, hi-8571 ac electrical characteristics notes: 1. guaranteed but not tested figur e 3 - line driver timing 0v 10v -10v 5v 0v 5v 0v t rx t 10% 90% t t 10% 90% t rx t phlx t phlx t plhx t 10% plhx t pin 3 pin 2 t fx t fx v pin 6 - pin 7 diff v+ = 5.0v, v- = -5v, t = operating temperature range (unless otherwise stated) a parameters symbol test conditions min typ max units line driver propagation delay output high to low output low to high line driver transition times output high to low output low to high t phlx plhx t t fx rx t - - 1.0 1.0 2.0 2.0 500 500 1.5 1.5 ns ns s s logic c in - - 10 pf pin 1 = logic 1 - - slp 1.5 = v+ pin 1 = logic 0 output high to low output low to high t fx rx t 5.0 5.0 15.0 15.0 10.0 10.0 s s pin 1 = logic 0 slp 1.5 = gnd low speed high speed defined in figure 3, no load pin 1 = logic 1 input capacitance (1) holt integrated circuits 4
notes: 1. all data taken in still air. 2. at 100% duty cycle, 5v power supplies. 3. low speed: data rate = 12.5 kbps, load : r = 400 ohms ,c=30nf. 4. high speed: data rate = 100 kbps, load : r = 400 ohms ,c=10nf. data not presented fo rc=30nf as this is considered unrealistic for high speed operation. 5. 8 lead plastic esoic (thermally enhanced soic with built in heat sink). heat sink not soldered. 6. similar results would be obtained with txaout shorted to txbout. 7. for applications requiring survival with continuous short circuit, operation above tj = 175c is not recommended. 8. data will vary depending on air flow and the method of heat sinking employed. package thermal characteristics package style arinc 429 supply current (ma) junction temp, tj c data rate 1 2 ta=25 c ta=85 c ta=125 c ta=25 c ta=85 c ta=125 c low speed 30.26 29.22 28.46 53.75 112.76 152.04 high speed 30.44 29.42 28.68 53.92 112.95 152.25 3 4 8 lead plastic esoic 5 txaout and txbout shorted to ground 6,7,8 package style arinc 429 supply current (ma) junction temp, tj c data rate 1 2 ta=25 c ta=85 c ta=125 c ta=25 c ta=85 c ta=125 c low speed 20.98 20.96 20.96 38.24 98.34 138.92 high speed 26.40 26.16 25.96 44.78 104.66 144.59 3 4 8 lead plastic esoic 5 maximum arinc load hi-8570, hi-8571 holt integrated circuits 5
hi-8570, hi-8571 legend: esoic - thermally enhanced small outline package (soic) with built-in heat sink ordering information hi - 857x xx x x 37.5 ohms 0 27.5 ohms 10 ohms part number 8570 8571 output series resistance built-in required externally package description 8 pin plastic dip (8p) 8 pin plastic narrow body esoic (8hne) 8 pin cerdip (8d) not available pb-free part number pd ps cr temperature range flow burn in -40c to +85c no i -55c to +125c -55c to +125c no yes t m part number t m i part number lead finish 100% matte tin (pb-free, rohs compliant) f tin / lead (sn / pb) solder blank holt integrated circuits 6
revision history p/n rev date description of change ds8570 e 08/19/13 remove references to military temp range. update reflow solder temperature and c in absolute maximum ratings. remove heat sink note on p. 5. update esoic-8 package drawing (8hne). hange dc current per input pin to +/-10ma holt integrated circuits 7 hi-8570, hi-8571
hi-8570 / hi-8571 package dimensions 8-pin plastic dip .385 .015 (9.799 .381) .025 .010 (.635 .254) .335 .035 (8.509 .889) .250 .010 (6.350 .254) .100 bsc (2.54) .135 .015 (3.429 .381) .055 .010 (1.397 .254) .1375 .0125 (3.493 .318) .019 .002 (.483 .102) .0115 .0035 (.292 .089) .300 .010 (7.620 .254) inches (millimeters) package type: 8p bsc = ?basic spacing between centers? is theoretical true position dimension and has no tolerance. (jedec standard 95) 8-pin plastic small outline (esoic) - nb (narrow body, thermally enhanced) inches (millimeters) package type: 8hne bsc = ?basic spacing between centers? is theoretical true position dimension and has no tolerance. (jedec standard 95) electrically isolated heat sink pad on bottom of package connect to any ground or power plane for optimum thermal dissipation d etail a 0 to 8 p in 1 s ee d etail a top view bottom view .154 .04 (3.90 1.10) .119 .04 (3.02 .97) .100 .10 (.04 .04) .050 (1.27) bsc .154 (3.90) .007 .003 (.175 .075) .033 .017 (.835 .435) .056 .006 (1.413 .163) bsc .236 (6.00) bsc .193 (4.90) bsc .016 .004 (.410 .100) holt integrated circuits 8
hi-8570 / hi-8571 package dimensions 8-pin cerdip inches (millimeters) package type: 8d bsc = ?basic spacing between centers? is theoretical true position dimension and has no tolerance. (jedec standard 95) .380 .004 (9.652 .102) .005 min (.127 min) .314 .003 (7.976 .076) .200 max (5.080 max) .248 .003 (6.299 .076) .039 .006 (.991 .154) .163 .037 (4.140 .940) .018 .006 (.457 .152) .056 .006 (1.422 .152) .015 min (.381min) .350 .030 (8.890 .762) .010 .006 (.254 .152) base plane seating plane .100 bsc (2.54) holt integrated circuits 9
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